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DS1305
21 of 22
NOTES:
1) ICC1T and ICC2T are specified with CE set to a logic 0 and EOSC bit = 0 (oscillator enabled).
2) ICC1A and ICC2A are specified with CE = VCC, SCLK=2MHz at VCC = 5V; SCLK = 500kHz
at VCC = 2.0V, VIL = 0V, VIH = VCC, and EOSC bit = 0 (oscillator enabled).
3) Measured at VIH = 2.0V or VIL = 0.8V and 10ms maximum rise and fall time.
4) Measured with 50pF load.
5) Measured at VOH = 2.4V or VOL = 0.4V.
6) ICC1S and ICC2S are specified with CE set to a logic 0. The EOSC bit must be set to logic 1
(oscillator disabled).
7) VCC = VCC1, when VCC1 > VCC2 + 0.2V (typical); VCC = VCC2, when VCC2 > VCC1.
8) VCC2 = 0V.
9) VCC1 = 0V.
10) VCC1 < VBAT.
11) VCCIF must be less than or equal to the largest of VCC1, VCC2, and VBAT.
12) Using a crystal on X1 and X2, rated for 6pF load.
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